Juan José Rodríguez-Andina

Associate Professor, Department of Electronic Technology, University of Vigo, Vigo, Spain.
MSc Industrial Engineering (Automatic Control and Electronics) from Polytechnic University of Madrid, Madrid, Spain (1990)
PhD (with honors) Industrial Engineering (Electronics) from University of Vigo, Vigo, Spain (1996)
Research interests: concurrent testing of complex systems (from digital circuits to industrial electronics) and FPGA implementation of complex processing systems

Senior Member, IEEE
Associate Editor, IEEE Transactions on Industrial Electronics
Associate Editor, IEEE Industrial Electronics Magazine
Member-at-large, IEEE Industrial Electronics Society (IES) Administrative Committee (AdCom)
Chair, IEEE IES Technical Committee on Education in Engineering and Industrial Technologies

1. Contact information
2. Courses taught
3. Academic positions
4. Publications
  4.1 Books & book chapters
  4.2 Journals
  4.3 Conferences
5. Editor/Reviewer for Journals
  5.1 Editor
  5.2 Reviewer
6. Committees
7. Projects
  7.1 Government-funded
  7.2 Industry-funded
8. Patents
9. Students advisor
  9.1 PhD
  9.2 MSc

1. Contact information: (return to top)
Departamento de Tecnología Electrónica, Universidad de Vigo
E.T.S.I.Industriales. Campus Universitario. 36310 Vigo-Spain
Tel.: +34 986 812 094
Fax: +34 986 811 987

Office: 230
Office hours: Mon & Wed, 11:00-14:00


2. Courses taught: (return to top)
3. Academic positions: (return to top)
2. 10/2001-03/2003: Deputy Head, Department of Electronic Technology, University of Vigo.
1. 12/1995-01/2001: Vice-Dean, High Technical School of Industrial Engineering, University of Vigo.

4. Publications: (return to top)
4.1 Books & book chapters: (return to top)
4. FPGAs and reconfigurable systems, J.J.Rodríguez-Andina, E. de la Torre, in The Industrial Electronics Handbook (2nd edition), J.D.Irwin, B.M.Wilamowski (eds.), CRC (in press).
3. Microelectronics Education, E.Mandado, J.Fariña, M.J.Moure, A.A.Nogueiras, J.J.Rodríguez-Andina,L.Rodríguez-Pardo, M.D.Valdés (eds.), Ed. Marcombo, 2002.
2. Métodos de síntesis de sistemas electrónicos seguros ante averías realizados mediante circuitos digitales configurables, PhD dissertation, J.J.Rodríguez-Andina, University of Vigo, 1996 (in Spanish).
1. Manual de Prácticas de Electrónica Digital, E.Mandado, J.J.Rodríguez-Andina, J.Álvarez, Ed. Marcombo, 1995 (in Spanish).

4.2 Journals: (return to top)
16. "Impact of power supply voltage variations on FPGA-based digital systems performance", J.Freijedo, L. Costas, J.Semião, J.J.Rodríguez Andina, M.J.Moure, F.Vargas, I.C.Teixeira, J.P.Teixeira, Journal of Low Power Electronics (JOLPE), April 2010.
15. "Guest editorial", J.J.Rodríguez-Andina, J.Y.Hung, IEEE Transactions on Industrial Electronics, March 2009.
14. "Algorithmic concurrent error detection in complex digital-processing systems", L.Costas, J.J.Rodríguez-Andina, IEEE Design & Test of Computers, January/February 2009.
13. "Time management for low-power design of digital systems", J.Semião, J.Freijedo, J.J.Rodríguez-Andina, F.Vargas, M.B.Santos, I.C.Teixeira, J.P.Teixeira, Journal of Low Power Electronics (JOLPE), December 2008.
12. "Delay modeling for power noise- and temperature-aware design and test of digital systems", J.Freijedo, J.Semião, J.J.Rodríguez-Andina, F.Vargas, I.C.Teixeira, J.P.Teixeira, Journal of Low Power Electronics (JOLPE), December 2008.
11. "Distortion mitigation in RF power amplifiers through FPGA-based amplitude and phase predistortion", J.L.Mato, M.Pereira, J.J.Rodríguez-Andina, J.Fariña, E.Soto, R.Pérez, IEEE Transactions on Industrial Electronics, November 2008.
10. "Signal integrity enhancement in digital circuits", J.Semião, M.Rodríguez-Irago, J.J.Rodríguez-Andina, L.Piccoli, F.Vargas, M.B.Santos, I.C.Teixeira, J.P.Teixeira, IEEE Design & Test of Computers, September/October 2008.
9. "Guest editorial", J.J.Rodríguez-Andina, J.Y.Hung, IEEE Transactions on Industrial Electronics, September 2008.
8. "Optimization of an industrial sensor and data acquisition laboratory through time sharing and remote access", L.Costas, D.Lago, J.Fariña, J.J.Rodríguez-Andina, IEEE Transactions on Industrial Electronics, June 2008.
7. "Features, design tools and application domains of FPGAs", J.J.Rodríguez-Andina, M.J.Moure, M.D.Valdés, IEEE Transactions on Industrial Electronics, August 2007.
Listed in Top 100 Documents Accessed of IEEE Xplore®, July 2007.
6. "Multifrequency equipment for sensing the state of electrodes in electric-arc furnaces", J.Fariña, J.J.Rodríguez-Andina, J.Bullón, Á.Lorenzo, IEEE Industrial Electronics Magazine, Summer 2007.
5. "Design of reconfigurable frequency measurement systems for high-accuracy QCM sensors", E.Lago, M.J.González Braña, M.J.Moure, M.D.Valdés, J.J.Rodríguez-Andina, IADAT Journal of Advanced Technology on Automation, Control and Instrumentation, IJAT-aci, September 2005.
4. "Learning microcontrollers with a CAI-oriented multi-micro simulation environment", A.del Río, J.J.Rodríguez-Andina, A.A.Nogueiras, IEEE Transactions on Education, May 2001.
3. "Análisis, modelado y diseño de convertidores CC-CC en paralelo de elevado rendimiento, usando control en modo tensión", A.Lago, A.A.Nogueiras, J.J.Rodríguez-Andina, C.Martínez-Peñalver, Información Tecnológica, 1999 (in Spanish).
2. "Principios básicos de seguridad ante averías", J.Marcos, J.J.Rodríguez-Andina, E.Mandado, V.Vázquez, Automática e Instrumentación, June 1995 (in Spanish).
1. "Sistemas seguros basados en autómatas programables", J.Marcos, E.Mandado, J.J.Rodríguez-Andina, V.Vázquez, Automática e Instrumentación, April 1995 (in Spanish).

4.3 Conferences: (return to top)
Keynotes:
1. "System-level algorithmic concurrent error detection for improved resilience in complex control systems", J.J.Rodríguez-Andina, ISRCS 2008 — 1st International Symposium on Resilient Control Systems, Idaho Falls, September 9-10, 2008.

Invited papers:
1. "Current and prospective application domains of FPGAs", J.J.Rodríguez-Andina, M.J.Moure, E.Lago, DESDes'04 — 2nd International Workshop on Discrete-Event System Design, Dychów, September 15-17, 2004.

Regular papers:
97. "Analysis of two FPGA design methodologies applied to an image processing system", L.Costas, P.Colodrón, J.J.Rodríguez-Andina, J.Fariña, M.Y.Chow, ISIE 2010 — IEEE International Symposium on Industrial Electronics, Bari, July 4-7, 2010.
96. "Delay modeling for power noise-aware design in Spartan-3A FPGAs", J.Freijedo, M.D.Valdés, M.J.Moure, L.Costas, J.J.Rodríguez-Andina, J.Semião, F.Vargas, I.C.Teixeira, J.P.Teixeira, SPL 2010 — VI Southern Programmable Logic Conference, Ipojuca, Porto de Galinhas, March 24-26, 2010.
95. "Comparing the efficiency of a clock-signal modulation technique for System-on-Chip in conducted versus radiated EMI environments", J.Semião, J.Freijedo, M.Moraes, C.Antunes, J.Benfica, F.Vargas, M.Santos, I.C.Teixeira, J.J.Rodríguez-Andina, J.P.Teixeira, D.Lupi, E.Gatti, F.Hernández, EMC Compo 2009 — 7th International Workshop on Electromagnetic Compatibility of Integrated Circuits, Toulouse, November 17-19, 2009.
94. "FPGA-based direct resistance and capacitance measurements", L.Ares, J.J.Rodríguez-Andina, J.Fariña, IECON 2009 — The 35th Annual Conference of the IEEE Industrial Electronics Society, Porto, November 3-5, 2009.
93. "A configurable framework for the education of digital electronic control systems", L.Costas, J.Fariña, J.J.Rodríguez-Andina, ICELIE 2009 — 3rd IEEE International Conference on E-Learning in Industrial Electronics, Porto, November 3-5, 2009.
92. "FPGA-based combinational implementation of the PHM scheduling algorithm", E.Soto, J.J.Rodríguez-Andina, JCRA 2009 — IX Reconfigurable Computing and Applications Conference, Alcalá de Henares, September 9-11, 2009.
91. "Delay-fault tolerance to power supply voltage disturbances analysis in nanometer technologies", J.Semião, J.Freijedo, J.J.Rodríguez-Andina, F.Vargas, M.Santos, I.C.Teixeira, J.P.Teixeira, IOLTS 2009 — 15th IEEE International On-Line Testing Symposium, Sesimbra, Lisbon, June 24-27, 2009.
90. "Delay modeling for power noise-aware design and test in 65nm FPGAs", J.Freijedo, L.Costas, J.Semião, J.J.Rodríguez-Andina, M.J.Moure, F.Vargas, I.C.Teixeira, J.P.Teixeira, LPonTR'09 — 2ndInternational Workshop on impact of Low-Power design on Test and Reliability, Seville, May 29, 2009.
89. "Measuring clock-signal modulation efficiency for Systems-on-Chip in electromagnetic interference environment", J.Semião, J.Freijedo, M.Moraes, M.Mallmann, C.Antunes, J.Benfica, F.Vargas, M.Santos, I.C.Teixeira, J.J.Rodríguez-Andina, J.P.Teixeira, D.Lupi, E.Gatti, L.García, F.Hernández, LATW 2009 — 10th IEEE Latin American Test Workshop, Armação de Búzios, Rio de Janeiro, March 2-5, 2009.
88. "Robust solution for synchronous communication among multi clock domains", J.Semião, J.Varela, J.Freijedo, J.J.Rodríguez-Andina, C.Leong, I.C.Teixeira, J.P.Teixeira, APCCAS 2008 — 2008 IEEE Asia Pacific Conference on Circuits and Systems, Macao, November 30-December 3, 2008.
87. "FPGA-based design, implementation, and evaluation of digital sinusoidal generators", M.Herrero, J.J.Rodríguez-Andina, J.Fariña, IECON 2008 — The 34th Annual Conference of the IEEE Industrial Electronics Society, Orlando, November 10-13, 2008.
86. "Power-supply instability aware clock signal modulation for digital integrated circuits", J.Semião, J.Freijedo, M.Moraes, M.Mallmann, C.Antunes, L.Rocha, J.Benfica, F.Vargas, M.Santos, I.C.Teixeira, J.J.Rodríguez-Andina, J.P.Teixeira, D.Lupi, E.Gatti, L.García, F.Hernández, EMC Europe 2008 — International Symposium on Electromagnetic Compatibility, Hamburg, September 8-12, 2008.
85. "Exploiting parametric power supply and/or temperature variations to improve fault tolerance in digital circuits", J.Semião, J.Freijedo, J.J.Rodríguez-Andina, F.Vargas, M.B.Santos, I.C.Teixeira, J.P.Teixeira, IOLTS 2008 — 14th IEEE International On-Line Testing Symposium, Rhodes, July 7-9, 2008.
84. "FPGA-based implementation of segmented predistorters for RF power amplifiers", J.L.Mato, M.Pereira, J.J.Rodríguez-Andina, J.Fariña, E.Soto, R.Pérez, ISIE 2008 — IEEE International Symposium on Industrial Electronics, Cambridge, June 30-July 2, 2008.
83. "Power and time management for low-power design", J.Semião, J.Freijedo, J.J.Rodríguez-Andina, F.Vargas, M.B.Santos, I.C.Teixeira, J.P.Teixeira, LPonTR'08 — 1stInternational Workshop on impact of Low-Power design on Test and Reliability, Lago Maggiore, May 29, 2008.
82. "Delay modeling for power noise-aware design and test of nanometer digital circuits", J.Freijedo, J.Semião, J.J.Rodríguez-Andina, F.Vargas, I.C.Teixeira, J.P.Teixeira, LPonTR'08 — 1stInternational Workshop on impact of Low-Power design on Test and Reliability, Lago Maggiore, May 29, 2008.
81. "Process tolerant design using thermal and power-supply tolerance in pipeline based circuits", J.Semião, J.J.Rodríguez-Andina, F.Vargas, M.B.Santos, I.C.Teixeira, J.P.Teixeira, DDECS 2008 — 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, Bratislava, April 16-18, 2008.
80. "A fault-tolerant methodology to design power and thermal noise-aware pipeline architectures", J.Semião, J.J.Rodríguez-Andina, F.Vargas, M.B.Santos, I.C.Teixeira, J.P.Teixeira, LATW 2008 — 9th IEEE Latin American Test Workshop, Puebla, February 17-20, 2008.
79. "An accurate path delay model for multi-VDD dynamic testing of digital circuits", J.Freijedo, J.Semião, J.J.Rodríguez-Andina, F.Vargas, I.C.Teixeira, J.P.Teixeira, LATW 2008 — 9th IEEE Latin American Test Workshop, Puebla, February 17-20, 2008.
78. "SoC prototyping environment for EMC-dependability measurements", F.Vargas, J.Benfica, M.Morães, E.Gatti, L.García, D.Lupi, F.Hernández, J.Semião, J.Freijedo, M.B.Santos, I.C.Teixeira, J.J.Rodríguez-Andina, J.P.Teixeira, DECIDE 2007 — First International Workshop on Dependable Circuit Design, Buenos Aires, December 6-7, 2007.
77. "System-on-chip signal integrity enhancement based on dynamic clock management", J.Semião, J.Freijedo, M.Morães, F.Vargas, M.B.Santos, I.C.Teixeira, J.J.Rodríguez-Andina, J.P.Teixeira, EMC Compo 2007 — 6th International Workshop on Electromagnetic Compatibility of Integrated Circuits, Torino, November 28-30, 2007.
76. "Improving the tolerance of pipeline based circuits to power supply or temperature variations", J.Semião, J.J.Rodríguez-Andina, F.Vargas, M.B.Santos, I.C.Teixeira, J.P.Teixeira, DFT 07 — The 22nd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Rome, September 26-28, 2007.
75. "On-line dynamic delay insertion to improve signal integrity in synchronous circuits", J.Semião, J.Freijedo, J.J.Rodríguez-Andina, F.Vargas, M.B.Santos, I.C.Teixeira, J.P.Teixeira, IOLTS 2007 — 13th IEEE International On-Line Testing Symposium, Crete, July 9-11, 2007.
74. "Mixed-signal design of dynamic delay buffers to improve tolerance to power supply and temperature variations", J.Semião, J.Freijedo, J.J.Rodríguez-Andina, F.Vargas, M.B.Santos, I.C.Teixeira, J.P.Teixeira, IMSTW 2007 — 13th Annual IEEE International Mixed-Signal Testing Workshop, Póvoa de Varzím, June 18-20, 2007.
73. "Reduction of intermodulation effects in power amplifiers through segmented predistortion", J.L.Mato, M.Pereira, J.J.Rodríguez-Andina, J.Fariña, E.Soto, R.Pérez, ISIE 2007 — IEEE International Symposium on Industrial Electronics, Vigo, June 4-7, 2007.
72. "Application of a reconfigurable platform for the education of electronic control loops", J.Fariña, L.Costas, C.Quintáns, J.J.Rodríguez-Andina, ISIE 2007 — IEEE International Symposium on Industrial Electronics, Vigo, June 4-7, 2007.
71. "Study of FPGA implementations of scheduling algorithms for high-performance switches", E.Lago, E.Soto, J.J.Rodríguez-Andina, ISIE 2007 — IEEE International Symposium on Industrial Electronics, Vigo, June 4-7, 2007.
70. "Measurement of electrical parameters in high-current arc furnaces", Á.Lorenzo, M.Lage, J.Bullón, J.Rivas, A.Fondado, A.Torres, J.Fariña, J.J.Rodríguez-Andina, ISIE 2007 — IEEE International Symposium on Industrial Electronics, Vigo, June 4-7, 2007.
69. "Enhancing the tolerance to power-supply instability in digital circuits", J.Semião, J.Freijedo, J.J.Rodríguez-Andina, F.Vargas, M.B.Santos, I.C.Teixeira, J.P.Teixeira, ISVLSI 2007 — IEEE Computer Society Annual Symposium on VLSI, Porto Alegre, May 9-11, 2007.
68. "Improving tolerance to power-supply and temperature variations in synchronous circuits", J.Semião, J.Freijedo, J.J.Rodríguez-Andina, F.Vargas, M.B.Santos, I.C.Teixeira, J.P.Teixeira, DDECS 2007 — 10th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, Kraków, April 11-13, 2007.
67. "Digital circuit signal integrity enhancement by monitoring power grid activity", J.Semião, M.Rodríguez-Irago, L.Piccoli, F.Vargas, M.B.Santos, I.C.Teixeira, J.J.Rodríguez-Andina, J.P.Teixeira, LATW 2007 — 8th IEEE Latin American Test Workshop, Cuzco, March 11-14, 2007.
66. "A model for the analytical definition of multi-VDD, multi-T dynamic tests in nanometer digital circuits", M.Rodríguez-Irago, J.Semião, J.J.Rodríguez-Andina, F.Vargas, I.C.Teixeira, J.P.Teixeira, LATW 2007 — 8th IEEE Latin American Test Workshop, Cuzco, March 11-14, 2007.
65. "FPGA implementation of iSLIP scheduling algorithms for high-performance switches", E.Lago, E.Soto, J.J.Rodríguez-Andina, DCIS 2006 — XXI Conference on Design of Circuits and Integrated Systems, Barcelona, November 22-24, 2006.
64. "Resistive open and bridging defects detection and diagnosis in digital systems using multi-VDD self-test", J.Semião, M.Rodríguez-Irago, J.J.Rodríguez-Andina, F.Vargas, M.Santos, I.C.Teixeira, J.P.Teixeira, DCIS 2006 — XXI Conference on Design of Circuits and Integrated Systems, Barcelona, November 22-24, 2006.
63. "Characterization of waterproofness in ready-to-wear professional garments", J.Yáñez, J.Fariña, J.J.Rodríguez-Andina, X.R.Nóvoa, A.Marques de Magallanes, IECON'2006 — The 32nd Annual Conference of the IEEE Industrial Electronics Society, Paris, November 7-10, 2006.
62. "Integration of microprocessors and FPGAs for the education in digital systems design", J.J.Rodríguez-Andina, J.Fariña, IECON'2006 — The 32nd Annual Conference of the IEEE Industrial Electronics Society, Paris, November 7-10, 2006.
61. "Statistical detection of the faulty behaviour of iSLIP-based schedulers for VOQ switches", M.Pereira, E.Soto, J.J.Rodríguez-Andina, DESDes 06 — 3rd IFAC International Workshop on Discrete-Event System Design, Rydzyna, September 26-28, 2006.
60. "Estudio de la implementación en FPGAs de algoritmos PHM / DPHM para conmutadores de paquetes de altas prestaciones", E.Lago, E.Soto, J.J.Rodríguez-Andina, JCRA 2006 — VI Jornadas sobre Computación Reconfigurable y Aplicaciones, Cáceres, September 12-14, 2006 (in Spanish).
59. "A system for testing the quality of waterproof ready-to-wear garments", J.Yáñez, J.Fariña, J.J.Rodríguez-Andina, A.Marques de Magallanes, SAAEI 2006 — XIII Annual Seminar on Automatic Control, Industrial Electronics and Instrumentation, Gijón, September 13-15, 2006.
58. "FPGA implementation of high-performance PHM / DPHM schedulers", E.Soto, E.Lago, J.J.Rodríguez-Andina, FPL 2006 — 16th International Conference on Field Programmable Logic and Applications, Madrid, August 28-30, 2006.
57. "Implementation of high performance schedulers for decoupled electro-optical packet switches", F.J.González-Castaño, C.López-Bravo, M.Rodelgo-Lacruz, J.García-Haro, P.Pavón-Mariño, J.Veiga-Gontán, E.Soto-Campos, J.J.Rodríguez-Andina, E.Lago, 11th European Conference on Networks & Optical Communications, Berlin, July 11-13, 2006.
56. "Dynamic fault detection in digital systems using dynamic voltage scaling and multi-temperature schemes", M.Rodríguez-Irago, J.J.Rodríguez-Andina, F.Vargas, J.Semião, I.C.Teixeira, J.P.Teixeira, IOLTS 2006 — 12th IEEE International On-Line Testing Symposium, Como, July 10-12, 2006.
55. "Design and development of a waterproof garment testing system", J.Yáñez, J.Fariña, J.J.Rodríguez-Andina, F.Poza, A.Marques de Magallanes, ISIE 2006 — IEEE International Symposium on Industrial Electronics, Montréal, July 9-13, 2006.
54. "On the use of multi-clock, multi-VDD and multi-temperature schemes to improve dynamic fault detection in digital systems", M.Rodríguez-Irago, J.J.Rodríguez-Andina, F.Vargas, J.Semião, I.C.Teixeira, J.P.Teixeira, ETS 2006 — 11th IEEE European Test Symposium, Southampton, May 21-25, 2006.
53. "FPGA-based stuck-at fault emulation in wavelet-based image coding systems", L.Costas, J.J.Rodríguez-Andina, E.Lago, LATW 2006 — 7th IEEE Latin American Test Workshop, Buenos Aires, March 26-29, 2006.
52. "Using multiple-clock schemes and multi-T test for dynamic fault detection in digital systems", M.Rodríguez-Irago, J.J.Rodríguez-Andina, F.Vargas, I.C.Teixeira, J.P.Teixeira, LATW 2006 — 7th IEEE Latin American Test Workshop, Buenos Aires, March 26-29, 2006.
51. "Multiple-clock and multi-VDD schemes for dynamic fault detection in nanometer digital circuits", M.Rodríguez-Irago, J.J.Rodríguez-Andina, F.Vargas, M.Santos, I.C.Teixeira, J.P.Teixeira, DCIS 2005 — XX Conference on Design of Circuits and Integrated Systems, Lisboa, November 23-25, 2005.
50. "Algorithmic fault detection in 2D wavelet transform systems", L.Costas, J.J.Rodríguez-Andina, DCIS 2005 — XX Conference on Design of Circuits and Integrated Systems, Lisboa, November 23-25, 2005.
49. "FPGA-based stuck-at fault emulation in gate-level system descriptions", L.Costas, J.J.Rodríguez-Andina, E.Lago, M.J.Moure, DCIS 2005 — XX Conference on Design of Circuits and Integrated Systems, Lisboa, November 23-25, 2005.
48. "Evaluation of a decoupled PHM scheduler implementation", F.J.González-Castaño, E.Soto, C.López-Bravo, M.Pereira, J.J.Rodríguez-Andina, DCIS 2005 — XX Conference on Design of Circuits and Integrated Systems, Lisboa, November 23-25, 2005.
47. "Thermo-electrical characterization of electrodes in arc furnaces for silicon metal production", J.Fariña, J.J.Rodríguez-Andina, J.Bullón, Á.Lorenzo, IECON'2005 — The 31st Annual Conference of the IEEE Industrial Electronics Society, Raleigh, November 6-10, 2005.
46. "FPGA-based system for the education in data acquisition and signal generation", J.Yáñez, D.Quintana, C.Quintáns, J.Fariña, J.J.Rodríguez-Andina, IECON'2005 — The 31st Annual Conference of the IEEE Industrial Electronics Society, Raleigh, November 6-10, 2005.
45. "A software tool for automating the segmentation of rotary dies for cardboard box production", J.Fariña, J.L.Mato, J.J.Rodríguez-Andina, J.M.Villacieros, SAAEI 2005 — XII Annual Seminar on Automatic Control, Industrial Electronics and Instrumentation, Santander, September 28-30, 2005.
44. "Characterization of wavelet-based image coding systems for algorithmic fault detection", L.Costas, J.J.Rodríguez-Andina, DSD2005 — 8th EUROMICRO Conference on Digital System Design — Architectures, Methods and Tools, Porto, August 30-September 3, 2005.
43. "High-level modelling and detection of the faulty behaviour of VOQ switches under balanced traffic", M.Pereira, E.Soto, J.J.Rodríguez-Andina, F.J.González-Castaño, DSD2005 — 8th EUROMICRO Conference on Digital System Design — Architectures, Methods and Tools, Porto, August 30-September 3, 2005.
42. "Dynamic fault test and diagnosis in digital systems using multiple clock schemes and multi-VDD test", M.Rodríguez-Irago, J.J.Rodríguez-Andina, F.Vargas, M.Santos, I.C.Teixeira, J.P.Teixeira, IOLTS'05 — 11th IEEE International On-Line Testing Symposium, Saint Raphael, French Riviera, July 6-8, 2005.
41. "Automatic segmentation of rotary dies for the production of corrugated cardboard boxes", J.Fariña, J.L.Mato, J.J.Rodríguez-Andina, M.Adamski, J.M.Villacieros, ISIE'2005 — IEEE International Symposium on Industrial Electronics, Dubrovnik, June 20-23, 2005.
40. "Using multiple clock schemes and multi-VDD test for dynamic fault detection in digital systems", M.Rodríguez-Irago, J.J.Rodríguez-Andina, D.Barrios-Júnior, F.Vargas, M.Santos, I.C.Teixeira, J.P.Teixeira, LATW'2005 — 6th IEEE Latin-American Test Workshop, Salvador de Bahía, March 30-April 2, 2005.
39. "Design of reconfigurable frequency measurement systems for high accuracy QCM sensors", E.Lago, M.J.González-Braña, M.J.Moure, M.D.Valdés, J.J.Rodríguez-Andina, IADAT-aci2005 — International Conference on Automation, Control and Instrumentation, Bilbao, February 2-4, 2005.
38. "Evaluation of a PHM scheduler implementation", F.J.González-Castaño, E.Soto-Campos, R.Asorey-Cacheda, C.López-Bravo, J.Fariña, J.J.Rodríguez-Andina, DCIS'2004 — XIX Conference on Design of Circuits and Integrated Systems, Bordeaux, November 24-26, 2004.
37. "An accurate algorithm for transistor sizing in analog CMOS design" P.Rodiz-Obaya, J.J.Rodríguez-Andina, J.Ramírez-Angulo, DCIS'2004 — XIX Conference on Design of Circuits and Integrated Systems, Bordeaux, November 24-26, 2004.
36. "Measurement of temperature profiles in the electrodes of arc furnaces for silicon metal production", J.Fariña, J.J.Rodríguez-Andina, J.Bullón, Á.Lorenzo, IAS'04 — IEEE Industry Applications Society 39th Annual Meeting, Seattle, October 3-7, 2004.
35. "ASIC PHM Scheduler Implementation", F.J.González-Castaño, E.Soto-Campos, R.Asorey-Cacheda, C.López-Bravo, J.Fariña, J.J.Rodríguez-Andina, DESDes'04 — 2nd International Workshop on Discrete-Event System Design, Dychów, September 15-17, 2004.
34. "Design and evaluation of a new kind of remote control switches for automotive applications", J.Fariña, J.J.Rodríguez-Andina, J.Doval, A.del Río, G.Peláez, J.Blanco, ISIE'2004 — 2004 IEEE International Symposium on Industrial Electronics, Ajaccio, May 4-7, 2004.
33. "Validation of concurrent error detection schemes for finite state machines", L.Costas, J.J.Rodríguez-Andina, DCIS'2003 — XVIII Conference on Design of Circuits and Integrated Systems, Ciudad Real, November 18-21, 2003.
32. "Measurement and analysis of the impedance of electrodes in arc furnaces for silicon production", J.Fariña, J.J.Rodríguez-Andina, J.Bullón, Á.Lorenzo, IECON'03 — The 29th Annual Conference of the IEEE Industrial Electronics Society, Roanoke, November 2-6, 2003. Best presentation award.
31. "A methodology for determining the frequency response of electrodes in arc furnaces for silicon metal production", J.Fariña, Ó.Fernández Pol, J.J.Rodríguez-Andina, J.Bullón, Á.Lorenzo, IAS'03 — IEEE Industry Applications Society 38th Annual Meeting, Salt Lake City, October 12-16, 2003.
30. "Sistema de medida configurable y automático para la caracterización de dispositivos semiconductores", M.Cacheda, L.Ricón, J.J.Rodríguez-Andina, J.Fariña, SAAEI'2003 — X Annual Seminar on Automatic Control, Industrial Electronics and Instrumentation, Vigo, September 10-12, 2003 (in Spanish).
29. "Characterization of the frequency response of electrodes in arc furnaces for silicon production", J.Fariña, Ó.Fernández Pol, J.J.Rodríguez-Andina, J.Bullón, Á.Lorenzo, ISIE'2003 — 2003 IEEE International Symposium on Industrial Electronics, Río de Janeiro, June 9-11, 2003.
28. "Fault simulation for algorithm-based concurrent error detection", L.Costas, J.J.Rodríguez-Andina, DCIS'2002 — XVII Conference on Design of Circuits and Integrated Systems, Santander, November 19-22, 2002.
27. "Microcontroller-based monitoring of electrodes in arc furnaces for silicon production", J.J.Rodríguez-Andina, J.Fariña, J.Bullón, Á.Lorenzo, IECON'02 — The 28th Annual Conference of the IEEE Industrial Electronics Society, Sevilla, November 5-8, 2002.
26. "Software tool for teaching/learning the behavior of analog integrated circuits", J.Fariña, J.J.Rodríguez-Andina, L.G.Samartín, EWME'2002 — 4th European Workshop on Microelectronics Education, Baiona, May 23-24, 2002.
25. "On monitoring the state of electrodes in arc furnaces for silicon production", J.Fariña, J.J.Rodríguez-Andina, J.Bullón, Á.Lorenzo, IECON'01 — The 27th Annual Conference of the IEEE Industrial Electronics Society, Denver, November 29-December 2, 2001.
24. "A tool for teaching/learning the behavior of analog integrated circuits", J.Fariña, J.J.Rodríguez-Andina, L.G.Samartín, DCIS'2001 — XVI Conference on Design of Circuits and Integrated Systems, Porto, November 20-23, 2001.
23. "A system to detect electrode breakages in arc furnaces", J.Fariña, J.J.Rodríguez-Andina, J.Bullón, Á.Lorenzo, DCIS'2001 — XVI Conference on Design of Circuits and Integrated Systems, Porto, November 20-23, 2001.
22. "On the design of checkers for single-word code spaces", J.J.Rodríguez-Andina, S.Fernández, DCIS'2001 — XVI Conference on Design of Circuits and Integrated Systems, Porto, November 20-23, 2001.
21. "SCMOS: A software tool for studying the behavior of analog MOS integrated circuits", J.Fariña, J.J.Rodríguez-Andina, L.G.Samartín, FIE2001 — Frontiers In Education Conference, Reno, October 10-13, 2001.
20. "On-line error detection in cipher systems", S.Fernández, J.J.Rodríguez-Andina, E.Mandado, DCIS'2000 — XV Conference on Design of Circuits and Integrated Systems, Montpellier, November 21-24, 2000.
19. "UVI51: A simulation tool for teaching/learning the 8051 microcontroller", A.del Río, J.J.Rodríguez-Andina, FIE2000 — Frontiers In Education Conference, Kansas City, October 18-21, 2000.
18. "Concurrent error detection in block ciphers", S.Fernández, J.J.Rodríguez-Andina, E.Mandado, ITC 2000 — 31st International Test Conference, Atlantic City, October 3-5, 2000.
17. "ASIC for switching parallel connected DC-DC converters", J.Fariña, J.J.Rodríguez-Andina, A.Lago, DCIS'98 — XIII Conference on Design of Circuits and Integrated Systems, Madrid, November 17-20, 1998.
16. "A digital integrated circuit for multiconverter switching", J.J.Rodríguez-Andina, J.Fariña, CIEP'98 — VI IEEE International Power Electronics Congress, Morelia, October 12-15, 1998.
15. "Circuito detector de fallos para convertidores CC/CC trabajando en paralelo", A.Nogueiras, A.del Río, J.J.Rodríguez-Andina, J.Doval, A.Lago, SAAEI'98 — V Seminario Anual de Automática, Electrónica Industrial e Instrumentación, Pamplona, September 15-18, 1998 (in Spanish).
14. "A digital integrated circuit for switching of parallel connected converters", J.J.Rodríguez-Andina, J.Fariña, A.Nogueiras, A.Lago, ISIE'98 — IEEE International Symposium on Industrial Electronics, Pretoria, July 7-10, 1998.
13. "Using a fault detection circuit for parallel connected DC/DC converters", A.del Río, A.Nogueiras, J.J.Rodríguez-Andina, J.Fariña, A.Lago, ISIE'98 — IEEE International Symposium on Industrial Electronics, Pretoria, July 7-10, 1998.
12. "Design and validation of fail-safe FSMs using regular structures", J.J.Rodríguez-Andina, S.Fernández, E.Mandado, DCIS'97 — XII Conference on Design of Circuits and Integrated Systems, Sevilla, November 19-21, 1997.
11. "Un modelo matemático para convertidores CC/CC en paralelo usando control en modo tensión sincronizado", A.Nogueiras, J.Doval, J.J.Rodríguez-Andina, A.Lago, SAAEI'97 — IV Seminario Anual de Automática, Electrónica Industrial e Instrumentación, Valencia, September 17-19, 1997 (in Spanish).
10. "Fail-safe output modules for electronic control systems", J.Marcos, V.Vázquez, E.Mandado, C.M.Peñalver, J.J.Rodríguez-Andina, ISIE'97 — IEEE International Symposium on Industrial Electronics, Guimarães, July 7-11, 1997.
9. "Aplicación de un simulador al desarrollo de prácticas con microcontroladores", J.J.Rodríguez-Andina, A.del Río, TAEE'96 — II Congreso de Tecnologías Aplicadas a la Enseñanza de la Electrónica, Sevilla, September 19-20, 1996 (in Spanish).
8. "Implementation of logic controllers with concurrent fault detection capabilities in PLDs", J.J.Rodríguez-Andina, S.Fernández, E.Mandado, IOLTW'96 — 2nd IEEE International On-Line Testing Workshop, St. Jean-de-Luz, July 8-10, 1996.
7. "A methodology for the education of digital CMOS integrated circuits design", S.Fernández, J.J.Rodríguez-Andina, E.Soto, J.Fariña, 1st European Workshop on Microelectronics Education, Grenoble, February 5-6, 1996.
6. "Diseño de controladores lógicos síncronos en VHDL a partir de descripciones mediante redes de Petri", E.Soto, J.J.Rodríguez-Andina, S.Fernández, DCIS'95 — X Congreso de Diseño de Circuitos Integrados y Sistemas, Zaragoza, November 15-17, 1995 (in Spanish).
5. "A new method to equalize the load current in parallel connected DC-DC converters", A.Lago, J.J.Rodríguez-Andina, C.M.Peñalver, CIEP'95 — IV IEEE International Power Electronics Congress, San Luis Potosí, October 16-19, 1995.
4. "Diseño de controladores lógicos seguros ante averías con FPGAs mediante descripciones de comportamiento", J.J.Rodríguez-Andina, J.Álvarez, E.Mandado, DCIS'94 — IX Congreso de Diseño de Circuitos Integrados, Maspalomas, November 9-11, 1994 (in Spanish).
3. "Metodología de diseño de controladores lógicos activados por flancos y/o niveles para su realización con LCAs", J.Álvarez, J.J.Rodríguez-Andina, E.Mandado, DCIS'94 — IX Congreso de Diseño de Circuitos Integrados, Maspalomas, November 9-11, 1994 (in Spanish).
2. "Design of safety systems using Field Programmable Gate Arrays", J.J.Rodríguez-Andina, J.Álvarez, E.Mandado, FPL'94 — 4th International Workshop on Field Programmable Logic and Applications, Prague, September 7-9, 1994.
1. "Advanced PAL-based PLDs analysis methodology", E.Mandado, J.Álvarez, J.J.Rodríguez-Andina, S.Pérez, FPL'93 — 3rd International Workshop on Field Programmable Logic and Applications, Oxford, September 8-10, 1993.

5. Editor/Reviewer for Journals: (return to top)
5.1 Editor: (return to top)
2008-...: Associate Editor, IEEE Transactions on Industrial Electronics
2009-...: Associate Editor, IEEE Industrial Electronics Magazine
 
2010: IEEE Transactions on Industrial Electronics, Guest Editor of the Special Section "Current trends in industrial electronics education", September 2010
2009: IEEE Transactions on Industrial Electronics, Guest Editor of the Special Section "2007 IEEE International Symposium on Industrial Electronics — Part II", March 2009
2008: IEEE Transactions on Industrial Electronics, Guest Editor of the Special Section "2007 IEEE International Symposium on Industrial Electronics", September 2008

5.2 Reviewer: (return to top)
2009: IEEE Transactions on Industrial Electronics
IEEE Transactions on Industrial Informatics
2008: IEEE Transactions on Industrial Electronics
ASP Journal of Low Power Electronics (JOLPE)
2007: IEEE Transactions on Industrial Electronics
  IEEE / ASME Transactions on Mechatronics
2006: Integration, The VLSI Journal
2005: International Journal of Applied Mathematics and Computer Science

6. Committees: (return to top)
Member-at-large of the Administrative Committee (AdCom) of the IEEE Industrial Electronics Society (IES) (2007-...)
IEEE IES Technical Committee on Education in Engineering and Industrial Technologies (contact)
  - Chair (2010-11)
  - Co-Chair (2008-09)
  - Founding member (2005-...)
Member of the IEEE IES Conference Board (2008-...)
Member of the IEEE IES Technical Committee on Electronic Systems on Chip (2009-...)

General Chair:
IEEE ISIE'2007 — 2007 IEEE International Symposium on Industrial Electronics
IEEE ICELIE'2010 — The 4th IEEE International Conference on E-Learning in Industrial Electronics
IEEE ICELIE'2009 — The 3rd IEEE International Conference on E-Learning in Industrial Electronics

Technical Program Chair:
IEEE ICELIE'2008 — The 2nd IEEE International Conference on E-Learning in Industrial Electronics

Special Sessions Chair:
IEEE IECON'2009 — The 35th Annual Conference of the IEEE Industrial Electronics Society

Steering Committee:
IEEE ICIT'2010 — International Conference on Industrial Technology
IEEE ISIE'2009 — 2009 IEEE International Symposium on Industrial Electronics

International Advisory Board:
IEEE IECON'2010 — The 36th Annual Conference of the IEEE Industrial Electronics Society
IEEE IECON'2008 — The 34th Annual Conference of the IEEE Industrial Electronics Society
IEEE ISIE'2008 — 2008 IEEE International Symposium on Industrial Electronics

Tutorials Co-Chair:
IEEE ICIT'2004 — International Conference on Industrial Technology

Organizing committee:
EWME'2002 — 4th European Workshop on Microelectronics Education

Track Chair:
e-Learning for Small and Medium Enterprises: IEEE INDIN'2010 — 8th IEEE International Conference on Industrial Informatics
Sensors, Actuators & System Integration: IEEE ISIE'2010 — 2010 IEEE International Symposium on Industrial Electronics
Education and Training: HSI'10 — 3rd International Conference on Human System Interaction
Factory Automation and Industrial Informatics: IEEE ICIT'2009 — International Conference on Industrial Technology
Industrial Information Technology: IEEE ISIE'2006 — 2006 IEEE International Symposium on Industrial Electronics

Technical Program Committees:
DCIS'2000-2009 — Conference on Design of Circuits and Integrated Systems
DESDes'2004-06-09 — International IFAC Workshop on Discrete-Event System Design
HSI'09 — 2nd IEEE International Conference on Human System Interaction
IDEW'06 — 1st International Design & Test For Systems-on-Chip for EMC Workshop
IEEE ICELIE'2006 — IEEE International Conference on E-Learning in Industrial Electronics
IEEE ICIT'2004-2005 — International Conference on Industrial Technology
IEEE INDIN'2006 — 4th International IEEE Conference on Industrial Informatics
IEEE IECON'2002, 2005, 2006, 2007 — Annual Conference of the IEEE Industrial Electronics Society
IEEE ISIE'2004-2005 — International Symposium on Industrial Electronics
IEEE SIES'2007-2008 — Symposium on Industrial Embedded Systems
ISRCS 2009-2010 — International Symposium on Resilient Control Systems
JCRA'2009 — Reconfigurable Computing and Applications Conference
LPonTR 2009-2010 — International Workshop on impact of Low-Power design on Test and Reliability
4th SPIE Europe International Symposium on Microtechnologies for the New Millenium — VLSI Circuits and Systems

Special Session organizer:
Industrial Applications of FPGAs & Embedded Systems: IEEE IECON'2010 — The 36th Annual Conference of the IEEE Industrial Electronics Society
Embedded Systems & Reconfigurable SoCs: IEEE INDIN'2010 — 8th IEEE International Conference on Industrial Informatics
Industrial Applications of FPGAs & Embedded Systems: IEEE ISIE'2010 — 2010 IEEE International Symposium on Industrial Electronics
Industrial Applications of FPGAs & Embedded Systems: IEEE IECON'2009 — The 35th Annual Conference of the IEEE Industrial Electronics Society
Industrial Applications of FPGAs & Embedded Systems: IEEE ISIE'2009 — 2009 IEEE International Symposium on Industrial Electronics
Industrial Applications of FPGAs & Embedded Systems: IEEE IECON'2008 — The 34th Annual Conference of the IEEE Industrial Electronics Society
Industrial Applications of FPGAs & Embedded Systems: IEEE ISIE'2008 — 2008 IEEE International Symposium on Industrial Electronics
Education in Engineering and Industrial Technologies: IEEE IECON'2005 — The 31st Annual Conference of the IEEE Industrial Electronics Society

7. Projects: (return to top)
7.1 Government-funded research projects: (return to top)
12. "Design of power noise-tolerant nanometer circuits. Application to the design of digital circuits in advanced FPGAs", Project grant Galician 08TIC010303PR (93,731.90 Euro), April 2008-October 2011 (Principal investigator).
11. "Methodology for automating the transistor-level design of CMOS cells. Application to the design and test of low-voltage digital circuits", Project grant Galician PGIDIT05 TIC30301PR (48,400 Euro), August 2005-October 2008 (Principal investigator).
10. "Methodology for the implementation and validation of concurrent error detection capabilities in complex digital systems", Project grant Galician PGIDIT04 PXIC30303PN (15,600 Euro), June 2004-September 2006 (Principal investigator). Complements project grant Spanish PN I+D+I TIC2003-2530.
9. "Methodology for the implementation and validation of concurrent error detection capabilities in complex digital systems", Project grant Spanish PN I+D+I TIC2003-2530 (48,760 Euro), December 2003-November 2006 (Principal investigator).
8. "Methodology for the characterization of the behavior of a microbalance sensor with respect to the environmental conditions and implementation in a measurement system", Project grant Galician PGIDIT03 TIC34001CT (69,542 Euro), October 2003-October 2005.
7. "Methodology for the design of quartz crystal microbalance sensors for electrochemical applications", Project grant Spanish PN I+D DPI2001-3501 (85,704 Euro), December 2001-December 2004.
6. "Methodology for the prediction and detection of breakages in electrodes for silicon production", Project grant European FEDER & Spanish PN I+D 1FD97-0073 (126,134 Euro), November 1998-January 2001.
5. "Study, development and validation of design and synthesis methods for digital electronic systems with concurrent fault detection capabilities", Project grant Galician XUGA32102B98 (21,035 Euro), October 1998-October 1999.
4. "Design and development of integrated circuits for the control of high efficiency power supplies", Project grant Galician XUGA32102B97 (61,964 Euro), 1997-2000.
3. "Study, simulation and development of parallel power supplies with large integration density", Project grant Galician XUGA32102B95 (46,218 Euro), 1995-1997.
2. "Description and synthesis of fail-safe logic controllers with reconfigurable digital circuits", Project grant Galician XUGA34001B94 (24,641 Euro), 1994-1996.
1. "Study, modelling and development of parallel connected DC/DC converters. Analysis of their effect on the power grid", Project grant Galician XUGA32104B93 (36,061 Euro), 1993-1995.

7.2 Industry-funded projects: (return to top)
18. "Analysis and study of a control system for laser cladding processes", Centro Tecnológico AIMEN (24,495 Euro), January 2010-December 2011 (Principal investigator).
17. "Automatic generator of copper ions in polyamide sequential-cathode tanks for salt and brackish water", Quantum Ingeniería Europea S.L. (24,205.89 Euro), January 2010-December 2011.
16. "Study of the integration of active electronic circuits in professional garments", Sagres, S.L. (13,712.15 Euro), January-July 2010.
15. "State of the art and future trends of electrical generation systems from marine streams", Sagres, S.L. (10,588.24 Euro), October 2008-April 2009.
14. "Study, development and FPGA implementation of phase predistortion algorithms for RF power amplifiers", Sistemas Audiovisuales Itelsis, S.L. (7,798.68 Euro), February-August 2008 (Principal investigator).
13. "System for evaluating fire-resistant ready-to-wear professional garments under realistic working conditions", Sagres, S.L. (57,040 Euro), October 2007-October 2010.
12. "Programmable automotive new generation electronic architecture", Centro Tecnológico de Automoción de Galicia — CTAG (36,000 Euro), January 2008-June 2009.
11. "Analysis, design and implementation of fault-tolerant schemes in redundant architectures for digital television emitters", Sistemas Audiovisuales Itelsis, S.L. (7,798.68 Euro), August 2007-January 2008 (Principal investigator).
10. "Development of controlled fusion devices for PUR filling fabrication", Centro Tecnológico de Grupo COPO, S.L. (9,388.89 Euro), July-November 2007.
9. "Analysis of the prebaking process of ELSA electrodes based on a multifrequency electronic system (cont.)", Ferroatlántica, S.L. (23,840 Euro), February 2006-January 2008.
8. "Analysis and compensation of the non-linear behavior of power amplifiers in RF transmission systems", Intelsis Sistemas Inteligentes, S.A. (26,583.12 Euro), February 2006-January 2008 (Principal investigator).
7. "Electronic system for controlling the test of waterproof ready-to-wear professional garments", Partenón-Sagres, S.L. (30,784.05 Euro), April 2004-March 2006.
6. "Analysis of the prebaking process of ELSA electrodes based on a multifrequency electronic system", Ferroatlántica, S.L. (36,000 Euro), February 2004-January 2006.
5. "Multifrequency electronic system for the analysis of the state of electrodes in arc furnaces for silicon production (II)", Ferroatlántica, S.L. (18,000 Euro), February 2003-January 2004.
4. "Multifrequency electronic system for the analysis of the state of electrodes in arc furnaces for silicon production", Ferroatlántica, S.L. (12,000 Euro), July-December 2002.
3. "Electronic system for the detection of breakages in electrodes of arc furnaces for silicon production", Ferroatlántica, S.L. (18,030.36 Euro), January-December 2001.
2. "Design, implementation and set-up of a new kind of remote control switch for automotive applications", Dalphimetal, S.A. (6,611.13 Euro), January-April 2001.
1. "Monitoring system for the silicon production process", Ferroatlántica, S.L. (16,517.39 Euro), August 1998-July 1999.

8. Patents: (return to top)
4. Portuguese patent 103436: Método para Aumentar a Tolerância Dinâmica da Parte Digital de um Sistema Electrónico Integrado, a Variações de Tensão Eléctrica de Alimentação e de Temperatura. J.P.Teixeira, I.C.Teixeira, J.Semião, M.B.Santos, J.J.Rodríguez-Andina, M.Rodríguez Irago, F.Vargas, L.Piccoli.
3. US Patent 6,636,055 B2: Multifrequency equipment for sensing the state of electrodes in electric-arc furnaces. J.Bullón, Á.Lorenzo, J.Fariña, J.J.Rodríguez-Andina.
2. European patent 01500209.0-2214: Multifrequency equipment for sensing the state of electrodes in electric-arc furnaces. J.Bullón, Á.Lorenzo, J.Fariña, J.J.Rodríguez-Andina.
1. Spanish patent 2172433: Equipo multifrecuencia detector del estado de los electrodos en los hornos de arco eléctrico. J.Bullón, Á.Lorenzo, J.Fariña, J.J.Rodríguez-Andina.

9. Students advisor:(return to top)
9.1 PhD:(return to top)
Currently advising: Judit Fernández Freijedo and José Luis Mato

Past students:
1. Lucía Costas Pérez, "Desarrollo y validación de mecanismos algorítmicos de detección concurrente de errores en sistemas de compresión de imágenes basados en la transformada wavelet", January 2006 (in Spanish).

9.2 MSc: (return to top)
45. Abel Balvís Calviño, "Design of a secured robotizad prosthetic leg for elderly people", January 2010. Project developed at LIRMM, Montpellier.
44. Iván Alén Fernández, "ROI-based AVC/H.264 video compression for object detection and tracking in traffic monitoring applications", October 2009. Project developed with the Multimedia group, IMEC, Leuven.
43. Javier Álvarez Borque, "Statistical approximations for updating digital roadmaps", July 2009. Project developed at Université du Littoral.
42. Bruno Tiago da Silva Gomes, "Register file architecture exploration based on a multi-standard wireless ASIP processor", February 2009. Project developed with the Multimedia group, IMEC, Leuven.
41. María Yudani Riobó Gestido, "Perceived quality assessment of scaled video", January 2009. Project developed with the Multimedia group, IMEC, Leuven.
40. Miguel Pita Priegue, "FPGA implementation of microprocessor peripherals", December 2008. Co-advisor: Dr. J.Fariña.
39. Marcos Herrero Álvarez, "FPGA-based design, implementation, and evaluation of digital sinusoidal generators", December 2008. Co-advisor: Dr. J.Fariña.
38. Jesús González Pérez, "Run-time video encoder adaptation for wireless video streaming applications", October 2008. Project developed with the Multimedia group, IMEC, Leuven.
37. Pablo Colodrón Villar, "Quantification and classification of HRMAS data", April 2008. Project developed at Katholieke Universiteit Leuven.
36. Susana Eiroa Lorenzo, "IBR for 3D terminal QoS", November 2007. Project developed at MM/NES, IMEC, Leuven.
35. Araceli Manso Corrales, "Software integration of an SVC decoder into the VLC media player", October 2007. Project developed at MM/NES, IMEC, Leuven.
34. Juan Álvaro Gallego Abella, "Contribución al estudio de la atenuación de temblores mediante simulación eléctrica funcional", September 2007. Project developed at LIRMM, Montpellier.
33. Fernando Sánchez Vilas, "Mapping a 3D graphics interface from Xingu to Nokia NGage QD", July 2007. Project developed at MM/DESICS, IMEC, Leuven.
32. Gemma Pérez Guerrero, "Procedimiento de test para el bloque lógico configurable de los circuitos de tipo FPGA basados en SRAM", July 2007. Project developed at LIRMM, Montpellier.
31. Ángela María Diéguez Martínez, "Puesta en marcha de técnicas de control colaborativo multirobot sobre una plataforma experimental compuesta por tres vehículos eléctricos", June 2007. Project developed at LIRMM, Montpellier.
30. Judit Fernández Freijedo, "Techniques of dynamic tolerance to the variations of VDD and T in digital systems", April 2007. Project developed at INESC-ID, Lisbon.
29. Alejandro Olveira Domínguez, "Estabilidad de una red de distribución de energía eléctrica sin inercia", September 2006. Project developed at Technische Universiteit Delft.
28. Jorge Fernández Salgado, "Étude de l'influence de la pression lors de la mesure du diamètre artériel dans des images échographiques", July 2006. Project developed at LIRMM, Montpellier.
27. Damián González Figueroa, "Performance evaluation of the error resilience tools in AVC", June 2006. Project developed at MM/DESICS, IMEC, Leuven.
26. María González Sal, "High level complexity model for an MPEG-4 Part 2 video encoder", May 2006. Project developed at MM/DESICS, IMEC, Leuven.
25. Cristóbal Patiño Rodríguez, "Transient stability impacts of decreasing inertia in a vertical-to-horizontal transformation of power systems", September 2005. Project developed at Technische Universiteit Delft.
24. Paula Yubero Plaza, "Integración de algoritmos de procesado de imágenes para el acceso a librerías a través de la web", July 2005. Project developed at LIRMM, Montpellier.
23. María del Mar Vidal Piñeiro, "Algorithmic optimization of multi-frame variable block-size motion estimation for the H.264/MPEG-4 standard", July 2005. Project developed at MM/DESICS, IMEC, Leuven.
22. Roi Ubeira Fernández, "Evaluation de differentes lois de commande", June 2005. Project developed at LIRMM, Montpellier.
21. Arsenio Míguez Rodríguez, "Closed loop for a T-shape sensor", May 2005. Project developed at LIRMM, Montpellier.
20. Fernando Martín Díaz Arluna, "Implementation of statistical channel impulse response models for indoor / outdoor environments", March 2005. Project developed at WISE, IMEC, Leuven.
19. Jorge Vila Fernández, "Joint analysis of video coding parameters and error resilience for quality optimization under bandwidth and complexity constraints in MPEG-4", December 2004. Project developed at MM/DESICS, IMEC, Leuven.
18. Rafal Nawrocki, "A distributed environment for automated high-level fault simulation in complex digital processing circuits", September 2004. Co-advisor: Prof. Marian Adamski.
17. Pablo Rodiz Obaya, "Desarrollo y validación de una herramienta para la automatización del diseño de circuitos integrados analógicos CMOS", July 2004.
16. Juan Pablo Ferreiros Arias, "Implementation of a view-dependent MPEG-4 VTC C++ decoder class", July 2004. Project developed at MICS/DESICS, IMEC, Leuven.
15. José Abelardo González Díaz, "Memory access optimization of a video decoder H.264/MPEG-4 AVC", December 2003. Project developed at MICS/DESICS, IMEC, Leuven.
14. Diego Loira Sotelo, "Streaming of 3D graphics for a multimedia home platform set-top box", September 2003. Project developed at MICS/DESICS, IMEC, Leuven.
13. Luis Gustavo Samartín Vázquez, "Entorno de simulación de circuitos electrónicos analógicos basados en transistores MOS", July 2003. Co-advisor: Dr. J.Fariña.
12. Lorena Ricón Recarey, "Diseño, realización y caracterización de bloques funcionales analógicos integrados en tecnología de 0.8 micras", April 2003.
11. Elena Lago Pousa, "Study and analysis of the complexity of the Advanced Video Codec", February 2003. Project developed at MICS/DESICS, IMEC, Leuven.
10. María José González Braña, "Diseño y validación de una arquitectura para la decodificación de imágenes fijas basada en la transformada inversa wavelet local", October 2002. Project developed at MICS/DESICS, IMEC, Leuven.
9. Eduardo López Estraviz, "Design and FPGA implementation of a LWT-based coding system for coloured still images", May 2002. Project developed at MICS/DESICS, IMEC, Leuven.
8. Catarina Torrell Alonso, "Diseño de los convertidores analógico-digital y digital-analógico para un modulador sigma-delta paso banda", October 2001. Project developed at Supélec, Paris.
7. Jairo Ares Blanco, "Software for real-time compression and transmission of video using wavelet transform and arithmetic coding", March 2001. Project developed at MICS/DESICS, IMEC, Leuven.
6. Enrique F.Torre Barbeito, Manuel A.Valverde García, "Diseño y realización de un procesador de guardia para sistemas basados en el MC68000", July 1998. Co-advisor: Dr. J.Fariña.
5. Isabel Souto Martínez, "Étude de la logistique d'auchan et mise en place d'un outil de recherche et d'analyse dans la gestion d'emplacements ("ORAGE")", September 2007. Project developed at Université du Littoral.
4. Eduardo Redondo Iglesias, "Simulación y búsqueda de episodios de contaminación industrial", September 2007. Project developed at Université du Littoral.
3. Javier Díaz Pernas, "Desarrollo de un software de simulación de decisiones logísticas y operativas en un operador logístico tipo", July 2005. Project developed at Université du Littoral.
2. Fátima Cereijo Conde, "Comparación de medios filtrantes percolación para su utilización en saneamiento autónomo", July 2004. Project developed at Université de Montpellier II.
1. Alejandro Espada Castro, "Tratamiento de efluentes de destilería mediante un filtro vertical plantado de phragmitas (wetland)", November 2003. Project developed at Université de Montpellier II.